Atmel公司的AT86RF212是低功耗低电压700/800/900 MHz 收发器,特别设计用于IEEE Standard 802.15.4, ZigBee, 6LoWPAN以及高数据速率ISM应用。AT86RF212单片RF收发器提供了天线和微控制器间完整接口,包括有模拟无线电部分,包括时间和频率同步的数字调制和解调, 以及数据缓冲功能。接收灵敏度高达-110dBm,可编程TX输出功率高达+10dBm,工作电压从1.8V到3.6V,内部有电压稳压器和电池监视器,工作温度-40℃到85℃。本文介绍了AT86RF212的主要特性和方框图,以及基本应用电路图和所用的材料清单。此外还介绍了扩展特性应用电路图。
The AT86RF212 is a low-power, low-voltage 700/800/900 MHz transceiver specially designed for the IEEE Standard 802.15.4, ZigBee, 6LoWPAN, and high data rate ISM applications. For the sub-1 GHz bands, it supports low data rates (20 and 40 kbit/s) of the IEEE Standard 802.15.4-2003 [2] and provides optional data rates (100 and 250 kbit/s) using O-QPSK, according to the IEEE Standard 802.15.4-2006 [1] and the respective IEEE P802.15.4c Draft Amendment [3]. Furthermore, proprietary High Data Rate Modes up to 1000 kbit/s can be employed.
The AT86RF212 is a true SPI-to-antenna solution. RF-critical components except the antenna, crystal, and de-coupling capacitors are integrated on-chip. MAC and AES hardware accelerators improve overall system power efficiency and timing.
The AT86RF212 single-chip RF transceiver provides a complete radio interface between the antenna and the microcontroller. It comprises the analog radio part, digital modulation and demodulation including time and frequency synchronization, as well as data buffering. The number of external components is minimized so that only the antenna, a filter (at high output power levels), the crystal, and four bypass capacitors are required. The bidirectional differential antenna pins are used in common for RX and TX, i.e. no external antenna switch is needed. Control of an external power amplifier is supported by two digital control signals (differential operation).
The receiver path is based on a low-IF architecture. After channel filtering and downconversion the low-IF signal is sampled and applied to the digital signal processing part. Communication between transmitter and receiver is based on direct sequence spread spectrum with different modulation schemes and spreading codes. The AT86RF212 supports the IEEE 802.15.4-2006 standard mandatory BPSK modulation and optional O-QPSK modulation in the 868.3 MHz and 915 MHz bands. In addition it supports the O-QPSK modulation defined in IEEE P802.15.4c for the Chinese 780 MHz band.
For applications not necessarily targeting IEEE compliant networks the radio transceiver supports proprietary High Data Rate Modes based on O-QPSK. A single 128 byte TRX buffer stores receive or transmit data. The AT86RF212 features hardware supported 128 bit security operation. The standalone AES encryption/decryption engine can be accessed in parallel to all PHY operational modes. Configuration of the AT86RF212, reading, and writing of data memory as well as the AES hardware engine are controlled by the SPI interface and additional control signals.
On-chip low-dropout voltage regulators provide the analog and digital 1.8 V power supply. Control registers retain their settings in SLEEP mode when the regulators are turned off. The RX and TX signal processing paths are highly integrated and optimized for low power consumption.
AT86RF212主要特性:
Fully Integrated 700/800/900 MHz-Band Transceiver
Chinese WPAN Band from 779 to 787 MHz
European SRD Band from 863 to 870 MHz
North American ISM Band from 902 to 928 MHz
Direct Sequence Spread Spectrum with Different Modulation Schemes and Data Rates
BPSK with 20 and 40 kbit/s, compliant to IEEE 802.15.4-2006
O-QPSK with 100 and 250 kbit/s, compliant to IEEE 802.15.4-2006
O-QPSK with 250 kbit/s, compliant to IEEE P802.15.4c
O-QPSK with 200, 400, 500, and 1000 kbit/s PSDU Data Rate
Flexible Combination of Frequency Bands and Data Rates
Industry Leading Link Budget
Receiver Sensitivity up to -110 dBm
Programmable TX Output Power up to +10 dBm
Low Power Supply Voltage from 1.8 V to 3.6 V
Internal Voltage Regulators and Battery Monitor
Low Current Consumption
SLEEP = 0.2 μA
TRX_OFF = 0.4 mA
RX_ON = 9.0 mA
BUSY_TX = 18 mA at PTX = 5 dBm
Digital Interface
Registers, Frame Buffer, and AES Accessible through SPI
Clock Output with Configurable Rate
Radio Transceiver Features
Adjustable Receiver Sensitivity
Integrated TX/RX Switch, LNA, and PLL Loop Filter
Fast Settling PLL Supporting Frequency Hopping
Automatic VCO and Filter Calibration
Integrated 16 MHz Crystal Oscillator
128 byte FIFO for Transmit/Receive
IEEE 802.15.4-2006 Hardware Support
FCS Computation and Check
Clear Channel Assessment
Received Signal Strength Indicator, Energy Detection, and Link Quality Indication
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